4.3 test

Lastly, the block test instantiates the 5-bit adder and then manually (and “magically”) computes what the answer should be. If the results match, the output port pass is set to 1. On non-match, simulation stops via the “die” construct.

     ;;; Testing!
     
     (blk test
          (out               pass)
          (in        5       a)
          (in        5       b)
          (in                c_in))
     
     (wire 5 s)
     (wire   c_out)
     
     (w/ five_bit_full_adder grinder         ; todo: allow direct mapping
         (c_out              . c_out)        ;  eg., (w/ BLK-NAME IREF-NAME)
         (s                  . s)
         (a                  . a)
         (b                  . b)
         (c_in               . c_in))
     
     (wire 6 grind (+ s (<< c_out 5)))
     (wire 6 magic (+ a b c_in))
     
     (a. pass (or (and (= grind magic)       ; pass should ALWAYS be 1
                       ;(fln "good luck dude! ~A = ~A" grind magic)
                       1)
                  (die "not correct!  grind =" grind "magic =" magic)))